演講題目： Circuit Building Blocks for Hardware Security
主講人：Dr. Vivek De (Intel)
High-entropy randomness is the bedrock of secure platforms, providing encryption keys for secure communications and media content protection as well as generating unique IDs for digital identity. Two forms of entropy are required in secure systems today: (i) dynamic entropy in the form of time-variant encryption keys and session IDs, and (ii) static entropy in the form of stable, repeatable device-unique keys, chip IDs, and digital fingerprints. True Random Number Generators (TRNGs) and Physically Unclonable Functions (PUFs) are the two critical circuits that can be used to generate dynamic and static entropy respectively. TRNGs harvest dynamic entropy from natural physical phenomena such as semiconductor device noise, oxide breakdown or radioactive decay, whereas PUFs harness the variations in semiconductor manufacturing processes to generate a time-invariant ID from nominally identical circuits. We will cover state-of-the-art designs of TRNGs and PUF circuits in advanced high-volume manufacturing.
Vivek De is an Intel Fellow and Director of Circuit Technology Research in Intel Labs. He is responsible for providing strategic technical directions for long term research in future circuit technologies and leading energy efficiency research across the hardware stack. He has 275 publications in refereed international conferences and journals with a citation H-index of 75, and 223 patents issued with 28 more patents filed (pending). He received an Intel Achievement Award for his contributions to an integrated voltage regulator technology. He received a Best Paper Award at the 1996 IEEE International ASIC Conference, and nominations for Best Paper Awards at the 2007 IEEE/ACM Design Automation Conference (DAC) and 2008 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). He also co-authored a paper nominated for the Best Student Paper Award at the 2017 IEEE International Electron Devices Meeting (IEDM). One of his publications was recognized in the 2013 IEEE/ACM Design Automation Conference (DAC) as one of the "Top 10 Cited Papers in 50 Years of DAC". Another one of his publications received the “Most Frequently Cited Paper Award” in the IEEE Symposium on VLSI Circuits at its 30th Anniversary in 2017. He was recognized as a Prolific Contributor to the IEEE International Solid-State Circuits Conference (ISSCC) at its 60th Anniversary in 2013, and a Top 10 Contributor to the IEEE Symposium on VLSI Circuits at its 30th Anniversary in 2017 . He served as an IEEE/EDS Distinguished Lecturer in 2011 and an IEEE/SSCS Distinguished Lecturer in 2017-18. He received the 2017 Distinguished Alumnus Award from the Indian Institute of Technology (IIT) Madras. He received a B.Tech from IIT Madras, India, a MS from Duke University, Durham, North Carolina, and a PhD from Rensselaer Polytechnic Institute, Troy, New York, all in Electrical Engineering. He is a Fellow of the IEEE.
主辦單位：IEEE SSCS Taipei Chapter
Host： IEEE SSCS Taipei Chapter Chair 張孟凡 教授